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download PDF document: ntb_hw_intel.4.pdf

NTB_HW_INTEL(4) FreeBSD Kernel Interfaces Manual NTB_HW_INTEL(4)
NAME ntb_hw_intel - Intel(R) Non-Transparent Bridge driver
SYNOPSIS To compile this driver into your kernel, place the following lines in your kernel configuration file:
device ntb device ntb_hw_intel
Or, to load the driver as a module at boot, place the following line in loader.conf(5):
ntb_hw_intel_load="YES"
DESCRIPTION The ntb_hw_intel driver provides support for the Non-Transparent Bridge (NTB) hardware in Intel Xeon E3/E5 and S1200 processor families, which allow one of their PCIe ports to be switched from transparent to non- transparent bridge mode. In this mode the bridge looks not like a PCI bridge, but like a PCI endpoint device. The driver hides hardware details, exposing memory windows, scratchpads and doorbells of the other side via a hardware independent KPI to the ntb(4) subsystem.
The hardware provides 2 or 3 memory windows to the other system's memory, 16 scratchpad registers and 14, 31 or 34 doorbells to interrupt the other system, depending on the platform. On Xeon processors one of the memory windows is typically consumed by the driver itself to work around multiple hardware errata.
CONFIGURATION The NTB configuration should be set by BIOS. It includes enabling NTB, choosing between NTB-to-NTB (back-to-back) or NTB-to-Root Port mode, enabling split BAR mode (one of two 64-bit BARs can be split into two 32-bit ones) and configuring BAR sizes in bits (from 12 to 29/39) for both NTB sides.
The recommended configuration is NTB-to-NTB mode, split bar enabled and all BAR sizes set to 20 (1 MiB). This needs to be done on both systems. Note, on Xeon SkyLake and newer platforms, split bar mode is not available.
SEE ALSO if_ntb(4), ntb(4), ntb_transport(4)
AUTHORS The ntb_hw_intel driver was developed by Intel and originally written by Carl Delsey <carl@FreeBSD.org>. Later improvements were done by Conrad E. Meyer <cem@FreeBSD.org> and Alexander Motin <mav@FreeBSD.org>.
BUGS NTB-to-Root Port mode is not yet supported, but it doesn't look very useful.
On Xeon v2/v3/v4 processors split BAR mode should be enabled to allow SB01BASE_LOCKUP errata workaround to be applied by the driver.